? semiconductor components industries, llc, 2006 august, 2006 ? rev. 1 1 publication order number: mc100ep91/d mc100ep91 2.5 v/3.3 v any level positive input to ?3.3 v/?5.5 v necl output translator description the mc100ep91 is a triple any level positive input to necl output translator. the device accepts lvpecl, lvttl, lvcmos, hstl, cml or lvds signals, and translates them to differential necl output signals ( ? 3.0 v / ? 5.5 v). to accomplish the level translation the ep91 requires three power rails. the v cc pins should be connected to the positive power supply, and the v ee pin should be connected to the negative power supply. the gnd pins are connected to the system ground plane. both v ee and v cc should be bypassed to ground via 0.01 f capacitors. under open input conditions, the d input will be biased at v cc /2 and the d input will be pulled to gnd. these conditions will force the q outputs to a low state, and q outputs to a high state, which will ensure stability. the v bb pin, an internally generated voltage supply, is available to this device only. for single-ended input conditions, the unused differential input is connected to v bb as a switching reference voltage. v bb may also rebias ac coupled inputs. when used, decouple v bb and v cc via a 0.01 f capacitor and limit current sourcing or sinking to 0.5 ma. when not used, v bb should be left open. features ? maximum input clock frequency > 2.0 ghz typical ? maximum input data rate > 2.0 gb/s typical ? 500 ps typical propagation delay ? operating range: v cc = 2.375 v to 3.8 v; v ee = ? 3.0 v to ? 5.5 v; gnd = 0 v ? q output will default low with inputs open or at gnd ? pb ? free packages are available* *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. marking diagrams* *for additional marking information, refer to application note and8002/d. so ? 20 wb dw suffix case 751d 1 20 a = assembly location wl, l = wafer lot yy, y = year ww, w = work week g or = pb ? free package 100 ep91 alyw 1 24 24 pin qfn mn suffix case 485l 24 1 see detailed ordering and shipping information in the package dimensions section on page 8 of this data sheet. ordering information 20 1 mc100ep91 awlyywwg http://onsemi.com (note: microdot may be in either location)
mc100ep91 http://onsemi.com 2 d1 d1 d2 q0 q1 q1 v ee d0 q0 d2 d0 v cc figure 1. logic diagram q2 q2 gnd v bb positive level input necl output r1 r1 r1 r1 r1 r1 r2 r2 r2 table 1. pin description pin name i/o default state description soic qfn 1, 20 3, 4, 12 v cc ? ? positive supply voltage. all v cc pins must be externally connected to power supply to guarantee proper opera- tion. 10 15, 16 v ee ? ? negative supply voltage. all v ee pins must be externally connected to power supply to guarantee proper opera- tion. 14, 17 19, 20, 23, 24 gnd ? ? ground. 4, 7 7, 11 v bb ? ? ecl reference voltage output 2, 5, 8 5, 8, 13 d[0:2] lvpecl, lvds, lvttl, lvcmos, cml, hstl input low noninverted differential inputs [0:2]. internal 75 k to v ee . 3, 6, 9 6, 9, 14 d[0:2] lvpecl, lvds, lvttl,lvcmos, cml, hstl input high inverted differential inputs [0:2]. internal 75 k to v ee and 75 k to v cc . when inputs are left open they default to (v cc ? v ee ) / 2. 19,16,13 2, 18, 22 q[0:2] necl output ? noninverted differential outputs [0:2]. typically terminated with 50 to v tt = v cc ? 2 v 18,15,12 1, 21, 17 q[0:2] necl output ? inverted differential outputs [0:2]. typically terminated with 50 to v tt = v cc ? 2 v 11 10 nc ? ? no connect. the nc pin is not electrically connected to the die and may safely be connected to any voltage from v ee to v cc . n/a ? ep ? exposed pad. (note 1) 1. the thermally conductive exposed pad on the package bottom (see case drawing) must be attached to a heat ? sinking conduit.
mc100ep91 http://onsemi.com 3 d1 d1 d2 17 18 16 15 14 13 12 4 3 5678 9 q0 11 10 q1 q1 q2 q2 nc v ee d0 19 20 2 1 v cc q0 d0 d2 v cc v bb mc100ep91 gnd gnd v bb figure 2. soic ? 20 lead pinout (top view) v ee d2 gnd q0 d1 v cc v cc gnd gnd q1 v bb nc v bb v cc gnd q1 d1 d2 q2 v ee mc100ep91 figure 3. qfn ? 24 lead pinout (top view)* q2 q0 d0 d0 18 12 4 3 5 6 789 11 10 2 1 17 16 15 14 13 19 24 23 22 20 21 exposed pad (ep) *all v cc , v ee and gnd pins must be externally connected to a power supply and the underside exposed pad must be attached to an adequate heat ? sinking conduit to guarantee proper operation. table 2. attributes characteristics value internal input pulldown resistor (r1) 75 k internal input pullup resistor (r2) 75 k esd protection human body model machine model charged device model > 2 kv > 150 v > 2 kv moisture sensitivity (note 2) pb pkg pb ? free pkg so ? 20 wb qfn ? 24 level 1 level 1 level 3 level 1 flammability rating oxygen index: 28 to 34 ul 94 v ? 0 @ 0.125 in transistor count 446 devices meets or exceeds jedec spec eia/jesd78 ic latchup test 2. for additional information, see application note and8003/d.
mc100ep91 http://onsemi.com 4 table 3. maximum ratings symbol parameter condition 1 condition 2 rating unit v cc positive power supply gnd = 0 v 3.8 to 0 v v ee negative power supply gnd = 0 v ? 6 v v i positive input voltage gnd = 0 v v i v cc 3.8 to 0 v v op operating voltage gnd = 0 v v cc ? v ee 9.8 v i out output current continuous surge 50 100 ma ma i bb pecl v bb sink/source 0.5 ma t a operating temperature range ? 40 to +85 c t stg storage temperature range ? 65 to +150 c ja thermal resistance (junction ? to ? ambient) jesd 51 ? 3 (1s ? single layer test board) 0 lfpm 500 lfpm soic ? 20 soic ? 20 90 60 c/w c/w ja thermal resistance (junction ? to ? ambient) jesd 51 ? 6 (2s2p multilayer test board) with filled thermal vias 0 lfpm 500 lfpm qfn ? 24 qfn ? 24 37 32 c/w c/w jc thermal resistance (junction ? to ? case) standard board soic ? 20 qfn ? 24 30 to 35 11 c/w c/w t sol wave solder pb pb ? free 225 225 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. table 4. dc characteristics positive inputs v cc = 2.5 v, v ee = ? 3.0 v to ? 5.5 v, gnd = 0 v (note 3) symbol characteristic ? 40 c 25 c 85 c unit min typ max min typ max min typ max i cc positive power supply current 10 14 20 10 14 20 10 14 20 ma v ih input high voltage (single ? ended) 1335 v cc 1335 v cc 1335 v cc mv v il input low voltage (single ? ended) gnd 875 gnd 875 gnd 875 mv v ihcmr input high voltage common mode range (differential configuration) (note 4) 0 2.5 0 2.5 0 2.5 v i ih input high current (@ v ih ) 150 150 150 a i il input low current (@ v il )d d 0.5 ? 150 0.5 ? 150 0.5 ? 150 a note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 3. input parameters vary 1:1 with v cc . v cc can vary +1.3 v / ? 0.125 v. 4. v ihcmr min varies 1:1 with gnd. v ihcmr max varies 1:1 with v cc .
mc100ep91 http://onsemi.com 5 table 5. dc characteristics positive input v cc = 3.3 v; v ee = ? 3.0 v to ? 5.5 v; gnd = 0 v (note 5) symbol characteristic ? 40 c 25 c 85 c unit min typ max min typ max min typ max i cc positive power supply current 10 16 24 10 16 24 10 16 24 ma v ih input high voltage (single ? ended) 2135 v cc 2135 v cc 2135 v cc mv v il input low voltage (single ? ended) gnd 1675 gnd 1675 gnd 1675 mv v bb pecl output voltage reference 1775 1875 1975 1775 1875 1975 1775 1875 1975 mv v ihcmr input high voltage common mode range (differential configuration) (note 6) 0 3.3 0 3.3 0 3.3 v i ih input high current (@ v ih ) 150 150 150 a i il input low current (@ v il )d d 0.5 ? 150 0.5 ? 150 0.5 ? 150 a note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 5. input parameters vary 1:1 with v cc . v cc can vary +0.5 / ? 0.925 v. 6. v ihcmr min varies 1:1 with gnd. v ihcmr max varies 1:1 with v cc . table 6. dc characteristics necl output v cc = 2.375 v to 3.8 v; v ee = ? 3.0 v to ? 5.5 v; gnd = 0 v (note 7) symbol characteristic ? 40 c 25 c 85 c unit min typ max min typ max min typ max i ee negative power supply current 40 50 60 38 50 68 38 50 68 ma v oh output high voltage (note 8) ? 1145 ? 1020 ? 895 ? 1145 ? 1020 ? 895 ? 1145 ? 1020 ? 895 mv v ol output low voltage (note 8) ? 1945 ? 1770 ? 1600 ? 1945 ? 1770 ? 1600 ? 1945 ? 1770 ? 1600 mv note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 7. output parameters vary 1:1 with gnd. 8. all loading with 50 resistor to gnd ? 2.0 v.
mc100ep91 http://onsemi.com 6 table 7. ac characteristics v cc = 2.375 v to 3.8 v; v ee = ? 3.0 v to ? 5.5 v; gnd = 0 v symbol characteristic ? 40 c 25 c 85 c unit min typ max min typ max min typ max v outpp output voltage amplitude f in 1.0 ghz (figure 4) f in 1.5 ghz (note 9) f in 2.0 ghz 575 525 300 800 750 600 600 525 250 800 750 550 550 400 150 800 750 500 mv t plh t phl0 propagation delay differential d to q single ? ended 375 300 500 450 600 650 375 300 500 450 600 675 400 300 550 500 650 750 ps t skew pulse skew (note 10) output ? to ? output (note 11) part ? to ? part (diff) (note 11) 15 25 50 75 95 125 15 30 50 75 105 125 15 30 70 80 105 150 ps t jitter rms random clock jitter (note 12) f in = 2.0 ghz peak ? to ? peak data dependant jitter f in = 2.0 gb/s (note 13) 0.5 20 2.0 0.5 20 2.0 0.5 20 2.0 ps v inpp input voltage swing (differential configuration) (note 14) 200 800 1200 200 800 1200 200 800 1200 mv t r , t f output rise/fall times @ 50 mhz (20% ? 80%) q, q 75 150 250 75 150 250 75 150 275 ps note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 9. measured using a 750 mv source, 50% duty cycle clock source. all loading with 50 to gnd ? 2.0 v. input edge rates 150 ps (20% ? 80%). 10. pulse skew = |t plh ? t phl | 11. skews are valid across specified voltage range, part ? to ? part skew is for a given temperature. 12. rms jitter with 50% duty cycle input clock signal. 13. peak ? to ? peak jitter with input nrz prbs 2 31 ? 1 at 2.0 gb/s. 14. input voltage swing is a single ? ended measurement operating in differential mode. the device has a dc gain of 50. figure 4. output voltage amplitude (v outpp ) / rms jitter vs. input frequency (f in ) at ambient temperature (typical) input frequency (ghz) 0.5 1.0 1.5 2.0 2.5 250 350 450 550 650 750 850 output voltage amplitude (mv) rms jitter (ps) 9.0 8.0 10 7.0 6.0 5.0 4.0 3.0 2.0 1.0 0 rms jitter amp figure 5. ac reference measurement d d q q t phl t plh v inpp = v ih (d) ? v il (d) v outpp = v oh (q) ? v ol (q)
mc100ep91 http://onsemi.com 7 application information all mc100ep91 inputs can accept lvpecl, lvttl, lvcmos, hstl, cml, or lvds signal levels. the limitations for differential input signal (lvds, hstl, lvpecl, or cml) are the minimum input swing of 150 mv and the maximum input swing of 3.0 v. within these conditions, the input voltage can range from v cc to gnd. examples interfaces are illustrated below in a 50 environment (z = 50 ) v ee gnd gnd v ee z z v cc v cc gnd lvpecl driver ep91 50 v tt = v cc ? 2.0 v 50 d d v cc v cc lvds driver ep91 z z d d 100 figure 6. standard lvpecl interface z z v cc v cc hstl driver ep91 50 50 d d gnd z z v cc v cc cml driver ep91 50 v cc 50 d d figure 7. standard lvds interface figure 8. standard hstl interface figure 9. standard 50 load cml interface gnd v ee gnd gnd v ee gnd gnd v ee gnd v ee gnd gnd z v cc v cc lvttl driver ep91 d d 1.5 v figure 10. standard lvttl interface z v cc v cc lvcmos driver ep91 d d open figure 11. standard lvcmos interface (d will default to v cc /2 when left open. a reference voltage of v cc /2 should be applied to d input, if d is interfaced to cmos signals.) gnd (externally generated reference voltage)
mc100ep91 http://onsemi.com 8 ordering information device package shipping ? mc100ep91dw so ? 20 38 units / rail MC100EP91DWG so ? 20 (pb ? free) 38 units / rail mc100ep91dwr2 so ? 20 1000 / tape & reel mc100ep91dwr2g so ? 20 (pb ? free) 1000 / tape & reel mc100ep91mn qfn ? 24 92 units / rail mc100ep91mng qfn ? 24 (pb ? free) 92 units / rail mc100ep91mnr2 qfn ? 24 3000 / tape & reel mc100ep91mnr2g qfn ? 24 (pb ? free) 3000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. figure 12. typical termination for output driver and device evaluation (see application note and8020/d ? termination of ecl logic devices.) driver device receiver device qd q d z o = 50 z o = 50 50 50 v tt v tt = gnd ? 2.0 v resource reference of application notes an1405/d ? ecl clock distribution techniques an1406/d ? designing with pecl (ecl at +5.0 v) an1503/d ? eclinps i/o spice modeling kit an1504/d ? metastability and the eclinps family an1568/d ? interfacing between lvds and ecl an1642/d ? the ecl translator guide and8001/d ? odd number counters design and8002/d ? marking and date codes and8020/d ? termination of ecl logic devices and8066/d ? interfacing with eclinps and8090/d ? ac characteristics of ecl devices
mc100ep91 http://onsemi.com 9 package dimensions 20 1 11 10 b 20x h 10x c l 18x a1 a seating plane h x 45 e d m 0.25 m b m 0.25 s a s b t e t b a dim min max millimeters a 2.35 2.65 a1 0.10 0.25 b 0.35 0.49 c 0.23 0.32 d 12.65 12.95 e 7.40 7.60 e 1.27 bsc h 10.05 10.55 h 0.25 0.75 l 0.50 0.90 0 7 notes: 1. dimensions are in millimeters. 2. interpret dimensions and tolerances per asme y14.5m, 1994. 3. dimensions d and e do not include mold protrusion. 4. maximum mold protrusion 0.15 per side. 5. dimension b does not include dambar protrusion. allowable protrusion shall be 0.13 total in excess of b dimension at maximum material condition. so ? 20 wb case 751d ? 05 issue g
mc100ep91 http://onsemi.com 10 package dimensions qfn 24 mn suffix 24 pin qfn, 4x4 case 485l ? 01 issue o notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.25 and 0.30 mm from terminal. 4. coplanarity applies to the exposed pad as well as the terminals. seating plane d b 0.15 c a2 a a3 a e pin 1 identification 2x 0.15 c 2x 0.08 c 0.10 c a1 c dim min max millimeters a 0.80 1.00 a1 0.00 0.05 a2 0.60 0.80 a3 0.20 ref b 0.23 0.28 d 4.00 bsc d2 2.70 2.90 e 4.00 bsc e2 2.70 2.90 e 0.50 bsc l 0.35 0.45 24x l d2 b 1 6 7 18 13 19 e 12 e2 e 24 0.10 b 0.05 a c c ref on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?t ypicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license un der its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended f or surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in a ny manner. mc100ep91/d eclinps is a trademark of semiconductor components industries, llc. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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